1. Field of the Invention
The present invention relates to a semiconductor element, and in particular relates to a nitride semiconductor element.
2. Description of the Related Art
With a nitride semiconductor element, sapphire is often used for the substrate, but it becomes difficult to reduce the cost of the nitride semiconductor element when sapphire is used for the substrate, since sapphire is high in cost. Furthermore, since sapphire is an insulator, if it is used as the substrate, instead of providing electrodes on the rear surface of the substrate, it becomes necessary to expose a portion of the nitride semiconductor layer above the substrate, and to form the electrodes on this exposed portion (when this is done, the area of the nitride semiconductor element becomes greater, and it becomes difficult to reduce the cost). Thus, in the prior art, a nitride semiconductor element has been proposed (refer to Japanese Patent Laid-Open Publication 2003-179258, Japanese Patent Laid-Open Publication 2003-142729, and Japanese Patent Laid-Open Publication 2003-8061) in which an n-type nitride semiconductor layer and a p-type nitride semiconductor layer (or an active layer and a p-type nitride semiconductor layer) have been laminated in order over an n-type Si substrate. Furthermore, in Japanese Patent Laid-Open Publication 2003-8061 it is described that, if a p-type silicon substrate is employed, it is necessary to manufacture p-type and n-type nitride crystals in order, in order to make a semiconductor light emitting element. Moreover, since an Si substrate is cheaper in price, as compared with an SiC substrate which is more expensive than sapphire, nitride semiconductor elements have been proposed, as in Japanese Patent Laid-Open Publication 2003-179258 and Japanese Patent Laid-Open Publication 2003-8061, in which a nitride semiconductor layer is laminated over various types of Si substrate. Further, in Japanese Patent Laid-Open Publication 2003-8061, there is described the production of a semiconductor light emitting element by manufacturing, in order, an n-type and a p-type nitride semiconductor on an n-type silicon substrate.
It should be understood that it is proposed in PD (Japanese Patent Laid-Open Publication 2000-004047 etc.) to provide an integrated element on such an Si substrate by forming a GaN type light emitting element on the Si substrate.
Furthermore, a structure is proposed in Japanese Patent Laid-Open Publication 2002-050790 in which tunnel junctions are provided within the structure of the light emitting element.
Yet further, in Japanese Patent Laid-Open Publication Heisei 11-224958 it is proposed to manufacture a light emitting element in which a p-SiC layer is grown on a p-SiC substrate, and an InGaN active layer and an AlGaN cladding layer are further laminated thereon.
Even further, in Japanese Patent Laid-Open Publication 2000-031535 etc., a structure is proposed in which a n-GaN/active layer/p-GaN element structure is laminated on an Si substrate with the interposition of BP, Al, ZnO or the like.
Still further, in Japanese Patent Laid-Open Publication Heisei 8-236453, as a method for crystal growth of a compound semiconductor using an Si substrate, it is proposed to form a p-type impurity doping layer over the Si substrate, and to grow a p-type epitaxial layer of gallium arsenide or the like over the p-type impurity doping layer.
Furthermore, in the prior art, in order to prevent the occurrence of cracks, buffering of the following type has been proposed (refer to Japanese Patent Laid-Open Publication 2002-170776). In detail, a thin film of AlN is grown as a first initial layer on a substrate consisting of 6H—SiC (0001), and Al0.15Ga0.75N which has been grown at a layer thickness of 200 nm as a second initial layer over this AlN thin film which constitutes the first initial layer is the buffer (refer to paragraph [0035] and FIG. 1 of Japanese Patent Laid-Open Publication 2002-170776). The fact that Si can be used as a substrate is described in this Japanese Patent Laid-Open Publication 2002-170776. Furthermore, in this Japanese Patent Laid-Open Publication 2002-170776, an invention is described in which a superlattice structure is formed by alternately laminating a first layer and a second layer a predetermined number of times on a substrate which consists of Si (silicon), SiC (silicon carbide), Al2O3 (sapphire) or the like.
An integrated element has also been proposed in which a GaN type light emitting element is formed on an Si substrate by providing MOS (refer to Japanese Patent Laid-Open Publication Heisei 7-321051) or PD (refer to Japanese Patent Laid-Open Publication 2000-004047) or the like on the Si substrate.
Furthermore, in Japanese Patent Laid-Open Publication 2002-050790, a structure is proposed in which tunnel junctions are provided within a light emitting element structure of the same type of material.
Moreover, in Japanese Patent Laid-Open Publication Heisei 11-224958, a light emitting element structure is proposed in which a p-SiC layer is grown on a p-SiC substrate, and then an InGaN active layer and an AlGaN cladding layer are laminated thereover.
However, in Japanese Patent Laid-Open Publication 2003-179258, Japanese Patent Laid-Open Publication 2003-142729, and Japanese Patent Laid-Open Publication 2003-8061, with an Si substrate and a nitride semiconductor layer, it is considered that, at their junction as shown in FIG. 24, a high electrical potential barrier is present at the interface between them; and accordingly, with the above described nitride semiconductor element, there has been the problem that the voltage (Vf) in the forward direction is extremely high.
Furthermore although, as in Japanese Patent Laid-Open Publication 2000-004047 etc., there is a method of providing a LED element by forming a diffuse layer or the like on an Si substrate, and by making a light receiving element or the like by forming a p-n junction and by laminating it on this substrate, however, with these hetero-junction interfaces between the Si substrate and the compound semiconductor of the LED element, it is not possible to implement a junction which is appropriate for the operation of the element, so that it has been difficult to drive both of the elements (the Si substrate and the LED element) sufficiently. In concrete terms, with these hetero-junction interfaces, it becomes difficult to plan sufficient matching for the bands etc., due to the band offset at these interfaces, and moreover when bias is applied. Furthermore, when growing a GaN type semiconductor on several different types of material surfaces, problems arise of crystalline deterioration due to non-matching of the lattices, differences in the coefficients of thermal expansion, and the like, so that, due to this as well, the above described problems at the junction portions between the different types of material are promoted and become worse. In addition, when the Si substrate surface at the junction portion with the GaN layer is an impurity diffusion region or the like, that region undergoes crystalline deterioration, and it is considered that the problems like those described above in growing the GaN layer thereon become yet more acute at the hetero-junction interface.
In Japanese Patent Laid-Open Publication 2002-050790 etc., a method is proposed of, at a p-n junction of a LED element, interposing a layer of an oppositely electrically conductive type in one of the p side and n side regions, thus causing tunneling at this junction, and supplying both p side and n side electric charges and injecting them into the light emitting layer. However, this is done with the objective of forming both the anode and cathode electrodes on the same conductive layer from the same material and by the same process, and so on.
In Japanese Patent Laid-Open Publication Heisei 11-224958, a device is proposed in which a LED element structure is formed from a SiC substrate, a SiC layer thereover, and a GaN type layer over that; but, since a p-n junction made with an interface between different materials is provided within this LED structure, a barrier occurs between the bands at this hetero-material interface, so that it is difficult to obtain a satisfactory LED element. Furthermore, with a light emitting element, the p-n junction is the most important portion in terms of determining its overall performance, and the decrease in performance of the light emitting element becomes rather acute due to the provision of a hetero-junction interface at this portion.
In Japanese Patent Laid-Open Publication 2000-031535 it is proposed, in order to form a light emitting element structure with a GaN type semiconductor on a Si substrate, to interpose various different types of material (BP, ZnO, SiO2), but the same type of problem as that described above occurs, since this material has a hetero-junction interface with both the Si substrate and the GaN layer.
Furthermore, with the buffer of Japanese Patent Laid-Open Publication 2002-170776, the crystalline characteristics of the nitride semiconductor layer which is formed on the Si substrate do not become adequate. Furthermore, in particular, if a nitride semiconductor layer is formed on a Si substrate, there is a tendency for it to be difficult to obtain a nitride semiconductor layer of good crystalline characteristics. Due to this, with the superlattice structure of the above described Japanese Patent Laid-Open Publication 2002-170776, in the case of forming, in particular, a nitride semiconductor layer while using a Si substrate as the substrate, it is the current situation that it is not possible to obtain a nitride semiconductor layer whose crystalline characteristics are as good as before.
With the above described integrated element, for example in Japanese Patent Laid-Open Publication Heisei 7-321051, in order to arrange a LED portion and a MOS portion within the surface of the substrate, the manufacturing cost becomes high, since the area per one element becomes large. On the other hand, with such an element which is integrated within the substrate surface, since there is a necessity for wiring up each element portion, a lot of man-hours are required, and the manufacturing cost is also increased thereby. Furthermore, since the area ratio which is occupied by the light emitting portion within the surface is low, when implementing a light emitting device or the like, the size of the light emitting portion is small in comparison with the implementation area for the element, so that it is difficult to obtain a satisfactory light output. Yet further, in order to arrange the LED portion and the MOS portion within the surface of the substrate, limitations arise with regard to the position of the LED within the surface of the element, in other words with regard to the position of the light source, and, in the implementation of a light emitting device or the like, position adjustment of a point light source becomes difficult, and in addition the optical design of the reflecting plate for the light emitting device becomes difficult, so that it is difficult to obtain a light emitting device with a suitable light output.
On the other hand, as another example of the above described integrated element, there is a method, as described in Japanese Patent Laid-Open Publication 2000-004047 etc., of making a p-n junction by diffusing a layer into a Si substrate, and thereby forming a light receiving element or the like, and of laminating on this substrate, thus providing a LED element; but it is not possible to implement an appropriate junction for element operation at the hetero-junction interface between the Si substrate and the semiconductor compound of the LED element, and it has been difficult to drive each of the elements (the Si substrate and the LED element) sufficiently. In concrete terms, with a hetero-junction interface, it becomes difficult to plan on sufficient matching of the band offset and so on at this interface, and further to plan for sufficient matching of the bands etc. when they are biased. According to considerations by the present inventors, since, as shown in FIG. 25, at the junction between the Si substrate and the nitride semiconductor layer, a high electrical potential barrier is present between both of them where they are joined (i.e. at the interface), it has been realized that there is a problem, in the above described prior art type of nitride semiconductor element which uses a Si substrate, with regard to the fact that the voltage in the forward direction (Vf) is extremely high. Thus it is an object of the present invention, according to one aspect thereof, to provide a semiconductor element, using Si for its substrate, whose voltage in the forward direction (Vf) at such an Si/GaN hetero-junction is lower than in the prior art.
Furthermore, in Japanese Patent Laid-Open Publication Heisei 9-213918, it is disclosed, by laminating a semiconductor layer (p-type or n-type) of the same type of material (a GaN type semiconductor compound) on the substrate, separating the surface by a groove or the like, and combination of the exposed layer (the electrode formation layer), to use, on the one hand a LED, and on the other hand a protection and compensation diode; but, in this case, the protective element and the light emitting element are laminated on the substrate using the same type of material, and are integrated together, and, since they are formed from the same type of material, there is a tendency for it to be difficult to bring out sufficiently the characteristics of each element, and in particular of the protective element. Furthermore, since they are integrated within the surface, in the same way as described above, there are problems with regard to light output, and with regard to the implementation and the manufacturing cost of such a light emitting device.
In Japanese Patent Laid-Open Publication 2002-050790 etc., a method is provided of, at a p-n junction of a LED element, interposing an oppositely conductive layer at one of the p side and the n-side region, causing tunneling at this junction, supplying both p side and n side electric charges, and injecting them into the light emitting layer. However, this is with the object of, in a semiconductor light emitting structure of one type of material, forming both the anode and the cathode in the same conductive layer from the same material and by the same process.
In Japanese Patent Laid-Open Publication Heisei 11-224958, it is proposed to form a LED element structure from a SiC substrate, a SiC layer over it, and a GaN type layer over that; but, since a hetero-material interface is provided within this LED structure, a barrier between bands occurs at the above described hetero-material interface, and it is difficult to obtain a suitable LED element.
Thus, the present invention takes as its object to provide a nitride semiconductor element which uses Si as a substrate, whose voltage in the forward direction (Vf) is lower than in the prior art.